DocumentCode
3313879
Title
THE VLSI AREA OF HIGH RATE LINEAR FILTERS USING LOOP PIPELINING AND PARALLELISM
Author
Bliss, William G. ; Wu, Kevin Chi-Rung
Volume
2
fYear
1990
fDate
5-7 Nov 1990
Firstpage
892
Keywords
Arithmetic; Concurrent computing; Delay; Finite impulse response filter; IIR filters; Nonlinear filters; Parallel processing; Pipeline processing; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 1990 Conference Record Twenty-Fourth Asilomar Conference on
ISSN
1058-6393
Print_ISBN
0-8186-2180-X
Type
conf
DOI
10.1109/ACSSC.1990.523466
Filename
523466
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