On the multiprocessor implementation of 2-D separable-denominator digital filters

Author

Hinamoto, Takao ; Muneyasu, Mitsuji

Author_Institution

Fac. of Eng., Hiroshima Univ., Japan

fYear

1992

fDate

17-19 Sep 1992

Firstpage

185

Lastpage

188

Abstract

The state-space realization of two-dimensional separable-denominator digital filters with real and complex poles is discussed. A new realization is achieved which is suitable for real-time processing in a multiprocessor system. This is done by maximizing parallelism and pipelining, and by minimizing data throughput delay. The performance of the realization is evaluated in terms of real-time processing and multiprocessor implementation. The number of required processors and the efficiency measure are also clarified for the realization

Keywords

parallel processing; pipeline processing; poles and zeros; real-time systems; state-space methods; two-dimensional digital filters; 2-D separable-denominator digital filters; complex poles; data throughput delay minimization; multiprocessor implementation; parallelism maximization; pipelining maximization; real poles; real-time processing; state-space realization; Computational complexity; Delay; Digital filters; Multiprocessing systems; Parallel processing; Pipeline processing; Stability; Throughput; Transfer functions; Two dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

Systems Engineering, 1992., IEEE International Conference on

Conference_Location

Kobe

Print_ISBN

0-7803-0734-8

Type

conf

DOI

10.1109/ICSYSE.1992.236912

Filename

236912