• DocumentCode
    3314501
  • Title

    Hardware in the Loop Test for Power System Modeling and Simulation

  • Author

    Wu, Jian ; Cheng, Yong ; Srivastava, Anurag K. ; Schulz, Noel N. ; Ginn, Herbert L., III

  • fYear
    2006
  • fDate
    Oct. 29 2006-Nov. 1 2006
  • Firstpage
    1892
  • Lastpage
    1897
  • Abstract
    This paper presents a design procedure of hardware in the loop (HIL) test for power system modeling and simulation. A HIL simulation refers to a system in which parts of a pure simulation have been replaced with actual physical components. HIL simulation is often used to understand the behavior of a new device, or to predict an outcome under different system conditions without knowing the detail of device design. Additionally, a HIL test could help to build a model and validate a data model of a new power device. To efficiently evaluate the various design of controller, HIL testing is beneficial. Requirements of a real-time system simulator for active compensator systems are discussed and a general function blocks are presented. Examples of power system modeling for active compensator and relay HIL tests are presented in this paper. Finally, preliminary results and future work of HIL for relay test is presented
  • Keywords
    power system control; power system simulation; testing; active compensator system; hardware in the loop; power system modeling; real-time system simulator; relay HIL test; Computational modeling; Data models; Hardware; Power system measurements; Power system modeling; Power system relaying; Power system simulation; Predictive models; Software testing; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Systems Conference and Exposition, 2006. PSCE '06. 2006 IEEE PES
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    1-4244-0177-1
  • Electronic_ISBN
    1-4244-0178-X
  • Type

    conf

  • DOI
    10.1109/PSCE.2006.296201
  • Filename
    4076027