DocumentCode :
3314604
Title :
A Framework for Self-Healing Radiation-Tolerant Implementations on Reconfigurable FPGAs
Author :
Gericota, Manuel G. ; Lemos, Luìs F. ; Alves, Gustavo R. ; Ferreira, José M.
Author_Institution :
ISEP\\LABORIS, Porto
fYear :
2007
fDate :
11-13 April 2007
Firstpage :
1
Lastpage :
6
Abstract :
To increase the amount of logic available in SRAM-based FPGAs manufacturers are using nanometric technologies to boost logic density and reduce prices. However, nanometric scales are highly vulnerable to radiation-induced faults that affect values stored in memory cells. Since the functional definition of FPGAs relies on memory cells, they become highly prone to this type of faults. Fault tolerant implementations, based on triple modular redundancy (TMR) infrastructures, help to keep the correct operation of the circuit. However, TMR is not sufficient to guarantee the safe operation of a circuit. Other issues like the effects of multi-bit upsets (MBU) or fault accumulation, have also to be addressed. Furthermore, in case of a fault occurrence the correct operation of the affected module must be restored and the current state of the circuit coherently re-established. A solution that enables the autonomous correct restoration of the functional definition of the affected module, avoiding fault accumulation, re-establishing the correct circuit state in realtime, while keeping the normal operation of the circuit, is presented in this paper.
Keywords :
SRAM chips; fault tolerance; field programmable gate arrays; integrated circuit reliability; nanotechnology; radiation effects; redundancy; SRAM-based FPGA; fault accumulation; fault tolerant implementation; logic density; multibit upsets; nanometric scales; nanometric technology; radiation-induced faults; reconfigurable FPGA; self-healing radiation-tolerant implementation; triple modular redundancy infrastructure; Circuit faults; Fault tolerance; Field programmable gate arrays; Flip-flops; Logic devices; Manufacturing; Protection; Reconfigurable logic; Redundancy; Single event transient;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Diagnostics of Electronic Circuits and Systems, 2007. DDECS '07. IEEE
Conference_Location :
Krakow
Print_ISBN :
1-4244-1162-9
Electronic_ISBN :
1-4244-1162-9
Type :
conf
DOI :
10.1109/DDECS.2007.4295300
Filename :
4295300
Link To Document :
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