A low-noise switched-capacitor interface for a capacitive micro-accelerometer

This paper presents a low-noise single-ended open-loop switched-capacitor interface circuit in 0.35μm CMOS technology for a comb structure micro-accelerometer. Using correlated double sampling, the low-frequency noise of the charge sensitive amplifier and the gain stage is suppressed, whereas the noise of the sensor charging reference voltage and the sample-and-hold circuit which follows the gain stage contributes considerably to the total output noise. In order to optimize the noise performance, an on-chip reference voltage generator and a dual-sample-and-hold circuit are designed. A detailed noise analysis of the two blocks is also presented. The fabricated prototype interface circuit achieves a measured capacitive sensitivity of 734mV/pF with an input equivalent noise floor of 0.41aF/√Hz and a dynamic range of 119.93dB over a 200Hz bandwidth at 1MHz sampling frequency.