• DocumentCode
    3314833
  • Title

    On Variable Selection in SAT-LP-based Bounded Model Checking of Linear Hybrid Automata

  • Author

    Herbstritt, Marc ; Becker, Bernd ; Ábrahám, Erika ; Herde, Christian

  • Author_Institution
    Albert-Ludwigs-Univ. Freiburg im Breisgau, Freiburg
  • fYear
    2007
  • fDate
    11-13 April 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    One approach for the verification of embedded systems, where discrete control is embedded in a continuous environment, is bounded model checking of linear hybrid automata. As a decision procedure within this context, a combination of a propositional SAT-solver and an LP-solver can be used. For such combined SAT-LP solvers, it is, among others, an open question how a robust, i.e., reliable, variable selection heuristics should be designed. In this work we investigate the design of such heuristics taking into account (1) the algorithmic structure of the combined SAT-LP-solver, and (2) efficiency issues in form of a counter-based design that adapts the popular concept of the VSIDS heuristics of Chaff. An empirical analysis of our framework shows (1) the importance of guard variables related to real-valued constraints and (2) reveals an ambiguity between the number of calls of the LP-solver and the time used by the LP-solver. As a result, we propose a simple, but efficient, variable selection heuristics that takes our observations into account and experimentally overcomes the limitations of existing ones.
  • Keywords
    automata theory; computability; formal verification; linear programming; LP-solver; SAT-solver; bounded model checking; counter-based design; embedded system verification; linear hybrid automata; linear programming solver; variable selection; Algorithm design and analysis; Automata; Automatic control; Counting circuits; Embedded system; Input variables; Medical control systems; Robustness; Temperature sensors; Thermostats;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits and Systems, 2007. DDECS '07. IEEE
  • Conference_Location
    Krakow
  • Print_ISBN
    1-4244-1162-9
  • Electronic_ISBN
    1-4244-1162-9
  • Type

    conf

  • DOI
    10.1109/DDECS.2007.4295318
  • Filename
    4295318