Title :
A partially adaptive routing algorithm for Benes network on chip
Author :
Zhang, Jing ; Gu, Huaxi
Author_Institution :
State Key Lab. of Integrated Service Networks, Xidian Univ., Xi´´an, China
Abstract :
The Benes topology is one of the choices for network on chip system designer for its simple topology and easy scalability with low degree. Routing algorithm plays an important role in the network performance of Benes network. However, traditional routing algorithms for Benes network are developed for permutation assignments not applicable for NoC communication. In this paper, we proposed a new partially adaptive routing algorithm for the Benes NoC. The new algorithm enables 2k-1 different paths between any particular pair of source node and destination node. In order to evaluate the performance of our routing algorithm, we compared it with a popular deterministic routing algorithm from delay and throughput aspects. The simulation was implemented with different packet lengths. The simulation results demonstrated that the new routing algorithm can obtain better performance and can provide on-chip communication with higher reliability.
Keywords :
integrated circuit design; multiprocessor interconnection networks; network routing; network topology; network-on-chip; Benes topology; deterministic routing algorithm; network-on-chip system design; partially adaptive routing algorithm; permutation assignment; Bandwidth; Delay; Intserv networks; Laboratories; Network topology; Network-on-a-chip; Partitioning algorithms; Routing; Scalability; Throughput; Benes; Network on Chip; deterninictic routing; partially adaptive routing algorithm;
Conference_Titel :
Computer Science and Information Technology, 2009. ICCSIT 2009. 2nd IEEE International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-4519-6
Electronic_ISBN :
978-1-4244-4520-2
DOI :
10.1109/ICCSIT.2009.5234772
