DocumentCode
3316148
Title
Some peculiarities of the designed logical circuit optimization
Author
Shipunov, V. ; Razumov, P.A. ; Kuptsov, E.O.
Author_Institution
Moscow State Inst. of Electron. Eng., Russia
fYear
2003
fDate
7-11 April 2003
Firstpage
216
Lastpage
218
Abstract
In solving the problem of multiterminal combination logical circuit synthesis, the circuit complexity (cost, dimension) and its operating speed are the criteria for optimization. While it is difficult to obtain an acceptable combination, a compromise between these parameters is recommended. By optimizing the two-level presentations, the minimal (short) function can be determined. The problem of the Boolean function minimization is the determination of the function minimal by the number of literals (minimal function) or by the number of conjunctions (short one). In optimizing multi-level presentations the methods of decomposition and factorization are used. Conjunctions factorization is the method of algebraic change of the conjunctions factors of one Boolean variable: factors including not less than two literals are extracted.
Keywords
Boolean functions; circuit complexity; logic circuits; logic design; minimisation; network synthesis; Boolean function minimization; circuit complexity; conjunction factorization; logical circuit optimization; multiterminal combination logical circuit; operating speed; Boolean functions; Circuit optimization; Circuit synthesis; Control system synthesis; Cost function; Field programmable gate arrays; Informatics; Libraries; Minimization; Optimization methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Modern Techniques and Technologies, 2003. MTT 2003. Proceedings of the 9th International Scientific and Practical Conference of Students, Post-graduates and Young Scientists
Conference_Location
Tomsk
Print_ISBN
0-7803-7669-2
Type
conf
DOI
10.1109/SPCMTT.2003.1438201
Filename
1438201
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