1000 and 1500 volts planar devices using field plate and semi-resistive layers: design and fabrication

An improved high-voltage technique based on the use of a field plate combined with semiresistive layers (SIPOS) on oxide is proposed. The field plate and SIPOS are shown to have complementary functions. Junction curvature electric field effects are reduced by the presence of the field plate. The silicon surface potential is linearized by a primary SIPOS layer on oxide, thereby reducing the peak electric field at the edge of the field plate. A second high-resistivity SIPOS layer provides excellent passivation. The use of SIPOS as both a field-linearizing film and passivation permits completion of all chemical vapor depositions in a single reactor run. The complete design and fabrication of high-voltage (1000 and 1500 V) planar transistors are described.<>