Characterization and modeling of the temperature dependence of lateral DMOS transistors for high-temperature applications of power ICs

A comprehensive experimental characterization of lateral DMOS electrical parameters over the temperature range 30-300 degrees C is presented. Simple analytic models are used to explain the observed behavior and to offer physical insight into the effects of temperature on LDMOS performance. A novel test structure is utilized to unambiguously separate channel-region effects from drift-region effects. It is shown that the LDMOS channel mobility follows a T/sup -2.5/ temperature dependence, which is significantly more severe than the T/sup -1.5/ dependence of conventional CMOS channel mobility. Other key temperature-dependent parameters include the threshold voltage, on-state resistance, saturation current, breakdown voltage, and leakage current, which places a fundamental limitation on the high-temperature operation of the LDMOS transistor.<>