DocumentCode :
3316527
Title :
Improved short-channel n-FET performance with virtual extensions
Author :
Connelly, Daniel ; Faulkner, Carl ; Clifton, Paul A. ; Grupp, D.E.
Author_Institution :
Acorn Technol., Inc., Stanford, CA, USA
fYear :
2005
fDate :
7-8 June 2005
Firstpage :
107
Lastpage :
110
Abstract :
A method is presented to use electrostatic coupling from a metal of appropriate effective workfunction, separated from the extension region by a thin insulator, to create a "virtual extension" in doped source/drain (S/D) MOSFETs. This electrostatically induced charge layer allows for lower extension doping and increased underlap between the doped extension and the gate, "sharpening" the carrier profile and improving short-channel device performance. In a typical n-channel MOSFET, switching currents in clock-limiting circuit paths are predicted to be 24% higher.
Keywords :
CMOS integrated circuits; MOSFET; CMOS circuits; carrier profile; clock-limiting circuit paths; doped source/drain MOSFET; effective workfunction; electrostatically induced charge layer; insulator; metal; n-channel MOSFET; short-channel n-FET performance; switching currents; virtual extensions; Appropriate technology; Doping profiles; Electrons; Electrostatics; FETs; Insulation; MOSFETs; Metal-insulator structures; Silicides; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Junction Technology, 2005. Extended Abstracts of the Fifth International Workshop on
Print_ISBN :
4-9902158-6-9
Type :
conf
DOI :
10.1109/IWJT.2005.203896
Filename :
1598682
Link To Document :
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