DocumentCode
3316722
Title
Low voltage performance of an advanced CMOS/BiCMOS technology featuring 18 GHz bipolar fT and sub-70 ps CMOS gate delays
Author
El-Diwany, M. ; Brassington, M. ; Razouk, R. ; van Wijnen, P. ; Akylas, V.
Author_Institution
Philips Res. & Dev. Center, Sunnyvale, CA, USA
fYear
1990
fDate
9-12 Dec. 1990
Firstpage
489
Lastpage
492
Abstract
SABRe (submicron advanced BiCMOS research) is a CMOS/BiCMOS technology for digital VLSI applications. Issues of device isolation, bipolar vs. MOS characteristics, and the effect of lowering the supply voltage on the CMOS and BiCMOS gate delays are discussed for this technology which features deep submicron dimensions. The SABRe process achieves both vertical and lateral scaling through the use of ultra-thin epitaxy. The isolation characteristics and the MOS/bipolar transistor characteristics were evaluated as a function of their respective geometries and the supply voltage. In comparing CMOS and BiCMOS circuit performance vs. the supply voltage, the BiCMOS totem-pole inverter ring oscillators showed a speed advantage over CMOS only at larger fanout when the supply voltage was reduced.<>
Keywords
BIMOS integrated circuits; CMOS integrated circuits; VLSI; delays; digital integrated circuits; integrated circuit technology; 18 GHz; 70 ps; CMOS/BiCMOS technology; LV performance; MOS/bipolar transistor characteristics; SABRe process; deep submicron dimensions; device isolation; digital VLSI applications; gate delays; lateral scaling; supply voltage; totem-pole inverter ring oscillators; ultra-thin epitaxy; vertical scaling; BiCMOS integrated circuits; Bipolar transistors; CMOS technology; Delay effects; Epitaxial growth; Geometry; Isolation technology; Low voltage; Very large scale integration; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Type
conf
DOI
10.1109/IEDM.1990.237061
Filename
237061
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