DocumentCode :
3317822
Title :
Bumping of silicon wafers by stencil printing
Author :
Adriance, James H. ; Whitmore, Mark A. ; Schake, Jeffrey D.
Author_Institution :
Universal Instrum. Corp., Binghamton, NY, USA
fYear :
1999
fDate :
1999
Firstpage :
313
Lastpage :
319
Abstract :
Solder paste deposition by metal mask stenciling is one of the most promising, cost effective wafer bumping processes that has been studied over the past few years. The process is based on a technique of “over printing” solder paste on wafers using a metal mask stencil. The term “over printing” is used because the solder paste deposits that are printed on the wafer are always larger than the attachment pads. The primary advantage of this wafer bumping process is that it does not require a sacrificial masking process for each wafer. Eliminating the masking process reduces the number of process steps and process cost. The only consumable material cost in the process is a stencil for each wafer design, solder paste, and deionized water for flux residue removal. The major steps in this wafer bumping process consist of solder paste stenciling directly on to the wafer, inspection of the solder paste, mass reflow, and post-soldering flux residue removal with deionized water. Some lower cost wet chemistry based under bump metallization processes are used with this bumping technique. This paper investigates some of the issues relative to using traditional squeegees versus enclosed printhead technology for Si wafer bumping. One of the major process variables in this bumping technique is stencil aperture cleanliness. This paper investigates manual cleaning and automated cleaning of the stencil between prints, as well as no stencil cleaning between prints. The results of the different processes are gauged by the bumping yield achieved and bump height repeatability within a single die as well as across the entire wafer
Keywords :
elemental semiconductors; inspection; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; reflow soldering; silicon; surface cleaning; surface contamination; Si; Si wafer bumping; attachment pads; automated cleaning; bump height repeatability; bumping technique; bumping yield; consumable material cost; cost effective wafer bumping processes; deionized water; enclosed printhead technology; flux residue removal; inspection; manual cleaning; mass reflow; metal mask stencil; metal mask stenciling; post-soldering flux residue removal; process cost; process steps; process variables; sacrificial masking process; silicon wafer bumping; solder paste; solder paste deposition; solder paste deposits; solder paste over-printing; solder paste stenciling; squeegees; stencil aperture cleanliness; stencil cleaning; stencil printing; under bump metallization processes; wafer bumping process; wafer bumping processes; wafer design; wet chemistry; Apertures; Assembly; Cleaning; Costs; Electronics industry; Instruments; Mechanical engineering; Passivation; Printing; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT
Conference_Location :
Austin, TX
ISSN :
1089-8190
Print_ISBN :
0-7803-5502-4
Type :
conf
DOI :
10.1109/IEMT.1999.804838
Filename :
804838
Link To Document :
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