On-chip integration of thermoelectric energy harvesting in 3D ICs

We present a full system integration of a thermoelectric energy harvesting system as an on-chip component into a 3D IC. Our system incorporates a lithographically patterned bi-metallic thin-film thermocouple network with a switched capacitor power converter and a charge buffer capacitor to harvest thermal energy produced by temperature gradients in typical 3D IC structures. Through heat transfer and transistor-level circuit simulations we demonstrate the energy harvesting potential of our system to power a low energy circuit component. Our proposed thin film based harvester does not require package re-design, since it is integrated on-chip using low cost CMOS compatible material. We evaluated integration of our proposed system into a 3D stacking of processor cores and DRAM memory. Even when operating at a conservative thermal bound of 84°C sufficient energy is harvested to continuously sustain a low-power adder for 29,640 cycles of single bit additions or 463 cycles of 64-bit additions with 12usec charging delay. Effectively we can run the adder continuously with less than 0.80% delay between bursts of operations.