Title :
Adaptive FIR filter architectures for run-time reconfigurable FPGAs
Author :
Rissa, Tero ; Uusikartano, Riku ; Niittylahti, Jarkko
Author_Institution :
Inst. of Digital & Comput. Syst., Tampere Univ. of Technol., Finland
Abstract :
This paper presents a technique for realizing adaptive FIR filters that use constant-coefficient multipliers on a run-time reconfigurable FPGA. Three different adaptive FIR filter architectures for run-time reconfigurable FPGAs are presented. It is shown that run-time reconfigurable logic can be used to efficiently implement adaptive constant-coefficient FIR filters. With reasonable configuration latency, benefits in speed, area and power consumption are obtained.
Keywords :
FIR filters; adaptive filters; field programmable gate arrays; adaptive FIR filter architecture; constant-coefficient multiplier; runtime reconfigurable FPGA; Adaptive filters; Computer architecture; Digital filters; Digital signal processing; Energy consumption; Field programmable gate arrays; Finite impulse response filter; Hardware; Reconfigurable logic; Runtime;
Conference_Titel :
Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on
Print_ISBN :
0-7803-7574-2
DOI :
10.1109/FPT.2002.1188664
