Second-generation CMOS-SEED smart pixel implementation of the error diffusion neural network

Smart pixel technology, which integrates optics and electronics technologies, provides the ability to realise novel signal processing architectures and functionality previously considered too difficult with a single technology. Smart pixel arrays provide the designer additional degrees of freedom by integrating electronic circuits, optoelectronic devices, and refractive, reflective, and diffractive optical components into a single compact architecture. Recently, we have investigated the application of smart pixel technology to the problem of a massively parallel, analog neural network for the purpose of achieving a specific image processing function known as digital image halftoning. Here, the input to the neural network is a high-resolution gray-scale image and the resulting output image is strictly binary. For optimum performance, this specific neural architecture requires symmetric, full-rank connectivity across the entire image in the form of an error diffusion filter.