DocumentCode :
3318496
Title :
Clustered programmable-reconfigurable processors
Author :
Gottlieb, Derek B. ; Cook, Jeffrey J. ; Walstrom, Joshua D. ; Ferrera, Steven ; Wang, Chi-Wei ; Carter, Nicholas P.
Author_Institution :
Illinois Univ., Urbana, IL, USA
fYear :
2002
fDate :
16-18 Dec. 2002
Firstpage :
134
Lastpage :
141
Abstract :
In order to pose a successful challenge to conventional processor architectures, reconfigurable computing systems must achieve significantly better performance than conventional programmable processors by both greatly reducing the number of clock cycles required to execute a wide range of applications and achieving high clock rates when implemented in deep-submicron fabrication technologies. In this paper, we describe the architecture of Amalgam, a clustered programmable-reconfigurable processor that integrates multiple conventional processors and blocks of reconfigurable logic onto a single chip. Amalgam´s distributed architecture allows implementation at high clock rates by limiting the impact of wire delay on cycle time and delivers an average of 13.7× speedup on our benchmark applications when compared to an equivalent architecture that contains only a single programmable processor.
Keywords :
VLSI; clocks; microprocessor chips; reconfigurable architectures; Amalgam; benchmark applications; clock cycles; clock rates; clustered programmable-reconfigurable processors; cycle time; deep-submicron fabrication technologies; distributed architecture; processor architectures; reconfigurable computing systems; reconfigurable logic; wire delay; Application software; Clocks; Computer architecture; Delay effects; Hardware; Network-on-a-chip; Propagation delay; Reconfigurable logic; Registers; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on
Print_ISBN :
0-7803-7574-2
Type :
conf
DOI :
10.1109/FPT.2002.1188674
Filename :
1188674
Link To Document :
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