Title :
Gate-aided drain to field breakdown of high voltage NMOS devices
Author :
Dumlao, A.P. ; Madurawe, R.U. ; McFarlane, T.
Author_Institution :
Nat. Semicond. Corp., Santa Clara, CA, USA
Abstract :
A limitation on-high-voltage CMOS application is gate-aided breakdown of n/sup +/ drain to field (BVdf ). The three-dimensional effect of the n/sup +/ junction bird´s beak shape, the presence of an oxide spacer, and lateral diffusion of the field implant must be analyzed to optimize BVdf. Extensive simulations are used to show that n/sup +/ junction position under the bird´s beak gradient dominates both breakdown voltage and gate dependency. Nonoverlap of junction edge to polysilicon gate by spacer technology is shown to improve BVdf. It is demonstrated that bird´s beak angle and drain implant energy variations add little to improve BVdf, while increasing field implant doses act to reduce it.<>
Keywords :
CMOS integrated circuits; MOS integrated circuits; electric breakdown of solids; ion implantation; HV CMOS; Si; bird´s beak angle; breakdown voltage; drain implant energy variations; field implant doses; gate dependency; gate-aided drain to field breakdown; high voltage NMOS devices; lateral diffusion; n/sup +/ junction bird´s beak shape; oxide spacer; polysilicon gate; spacer technology; three-dimensional effect; Breakdown voltage; Electric breakdown; Implants; MOS devices; Space technology;
Conference_Titel :
Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1990.237196