The effect of cluster packing and node duplication control in delay driven clustering

Although delay driven clustering algorithms can optimize circuit delay, they usually result in huge area increase. We present a node duplication control strategy along with a simple packing algorithm that greatly reduce the area penalty with a very small degradation in performance. We use the Quartus Design System from Altera to test our algorithm for a set of MCNC benchmark circuits. The results show that while a 14.5% average delay decrease can be achieved with an average area increase of 240.8%, the algorithm reduces the average area penalty to 27.4% with an average delay decrease of 13.8%. Also the number of clusters and the fitting time reported by Quartus are reduced by more than 91% and 60%, respectively.