Title :
A case of precision-tunable STT-RAM memory design for approximate neural network
Author :
Ying Wang ; Lili Song ; Yinhe Han ; Yuanqing Cheng ; Huawei Li ; Xiaowei Li
Author_Institution :
State Key Lab. of Comput. Archit., Inst. of Comput. Technol., Beijing, China
Abstract :
Multi-level STT-RAM cell is able to boost the memory density at the expense of read/write reliability. However, the induced data integrity issue in STT-RAM memory can be effectively masked by a wide spectrum of applications with intrinsic forgiveness, which belong to the specific domain such as multimedia, synthesis and mining. In this work, we leverage the reconfigurable capability of MLC STT-RAM to provide variable-precision data storage for popular machine learning architectures. The targeted STT-RAM memory design is able to transform between multiple work modes and adaptable to meet the varying quality constraint of approximate applications. Particularly, we demonstrate the concept of precision-tunable STT-RAM memory with the emerging Convolution Neural Network accelerators and elaborate on the data mapping policy in STT-RAM memory to achieve the best energy-efficiency.
Keywords :
CMOS memory circuits; learning (artificial intelligence); logic design; neural nets; random-access storage; approximate neural network; convolution neural network accelerators; data integrity issue; data mapping policy; machine learning architectures; memory density; precision-tunable STT-RAM memory design; Accuracy; Buffer storage; Computer architecture; Random access memory; Reliability; Resistance; Switches; Machine Learning; Neural Network; STT-RAM;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7168938
