DocumentCode
3320297
Title
Exploring Use of NoC for Reconfigurable Video Coding
Author
Patel, Alpesh ; Kapoor, Hemangee K.
Author_Institution
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol. Guwahati, Guwahati, India
fYear
2010
fDate
3-7 Jan. 2010
Firstpage
134
Lastpage
139
Abstract
MPEG RVC is a standard under development which addresses the issues of standardization of video coding tools and multi-format codec design. It is likely to have SoC based solutions developed for MPEG RVC in future. In this paper we evaluate Network on Chip (NoC) as an on-chip interconnection mechanism for MPEG RVC SoC. We use MPEG RVC reference C code for MPEG 2 and AVC intra-only decoding, and the open source NoC named NoCem for simulation. We make a new simulation platform over NoCem by using VHDL FLI. This platform allows us to make cycle accurate measurements. We experiment with different input resolutions and different configurations of NoCem and measure the network performance and overhead for reconfiguration. The results point that NoC is potential candidate for on-chip interconnection mechanism for MPEG RVC SoC.
Keywords
data compression; network-on-chip; video codecs; video coding; AVC intra-only decoding; MPEG RVC SoC standard; NoC; VHDL FLI; multiformat codec design; network on chip; network performance measurement; on-chip interconnection mechanism; reconfigurable video coding; system on chip; Code standards; Computer science; Costs; Decoding; Network-on-a-chip; Transform coding; Very large scale integration; Video codecs; Video coding; Video compression; MPEG RVC; Network on Chip; NoC; Reconfigurable Video Coding;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2010. VLSID '10. 23rd International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
978-1-4244-5541-6
Type
conf
DOI
10.1109/VLSI.Design.2010.80
Filename
5401271
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