• DocumentCode
    3320606
  • Title

    An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology

  • Author

    Hoppner, Sebastian ; Haenzsche, Stefan ; Scholze, Stefan ; Schuffny, Rene

  • Author_Institution
    Fac. of Electr. Eng. & Inf. Technol., Tech. Univ. Dresden, Dresden, Germany
  • fYear
    2015
  • fDate
    24-27 May 2015
  • Firstpage
    1738
  • Lastpage
    1741
  • Abstract
    This paper presents an all-digital pulse width modulator (PWM) for application in integrated DC-DC converters. Based on a multi-phase clock signal a PWM resolution of 62.5ps is achieved, resulting in up to 16-Bit PWM resolution at 4096ns period. The PWM signal duty cycle and period can be arbitrarily changed within a single cycle which allow efficient alldigital implementation of spread spectrum clocking schemes. The circuit has been implemented in 28nm SLP CMOS technology. It consumes 0.3mW when operating from a 1.0V supply.
  • Keywords
    CMOS integrated circuits; DC-DC power convertors; PWM power convertors; low-power electronics; PWM signal duty cycle; SLP CMOS technology; all-digital PWM generator; all-digital pulse width modulator; integrated DC-DC converter; multiphase clock signal; power 0.3 mW; size 28 nm; spread spectrum clocking scheme; super low power complementary metal oxide semiconductor; voltage 1 V; word length 16 bit; CMOS integrated circuits; CMOS technology; Clocks; Generators; Pulse width modulation; Signal resolution; System-on-chip; ADPLL; PWM generator DC-DC converter; power management;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
  • Conference_Location
    Lisbon
  • Type

    conf

  • DOI
    10.1109/ISCAS.2015.7168989
  • Filename
    7168989