DocumentCode :
3320979
Title :
A comparison of package thermal resistance using simulation and measurement for two-layer and four-layer PBGA substrate designs
Author :
Hsieh, Steven ; Chee, Soon Shin ; Pan, Stephen ; Sun, Jyi-Yu ; Lam, Patrick
fYear :
2002
fDate :
4-6 Dec. 2002
Firstpage :
409
Lastpage :
414
Abstract :
Two Xilinx PBGA packages were evaluated to undergo 4 layer to 2 layer transformation. These packages are the FG256 and FG456. Both packages are full array 1.0mm fine pitch plastic ball grid array (PBGA) packages. Converting from a four-layer package to a two-layer package has the benefit of reducing the substrate cost of the package. However, it is of interest to characterize the impact on the package thermal resistance when the four layer package designs are converted to two layer package designs. The approach of simulations through thermal modeling are utilized to characterize the thermal resistance of the two and four-layer versions of the packages as a means of evaluating the impact to thermal performance. Measurements of the PBGA packages have also been previously available and are used to verify and calibrate the accuracy of the thermal models. The results of the simulations quantifies the difference in thermal performance for the two layer and four layer variations of the substrates.
Keywords :
ball grid arrays; fine-pitch technology; plastic packaging; substrates; thermal resistance; 1.0 mm; fine pitch plastic ball grid array package; four-layer package; substrate design; thermal model; thermal resistance; two-layer package; Costs; Electrical resistance measurement; Electronic packaging thermal management; Electronics packaging; Finite element methods; Joining processes; Plastic packaging; Printed circuits; Sun; Thermal resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Materials and Packaging, 2002. Proceedings of the 4th International Symposium on
Print_ISBN :
0-7803-7682-X
Type :
conf
DOI :
10.1109/EMAP.2002.1188874
Filename :
1188874
Link To Document :
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