DocumentCode :
3321958
Title :
Pinpointing Cache Timing Attacks on AES
Author :
Rebeiro, Chester ; Mondal, Mainack ; Mukhopadhyay, Debdeep
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
fYear :
2010
fDate :
3-7 Jan. 2010
Firstpage :
306
Lastpage :
311
Abstract :
The paper analyzes cache based timing attacks on optimized codes for Advanced Encryption Standard (AES). The work justifies that timing based cache attacks create hits in the first and second rounds of AES, in a manner that the timing variations leak information of the key. To the best of our knowledge, the paper justifies for the first time that these attacks are unable to force hits in the third round and concludes that a similar third round cache timing attack does not work. The paper experimentally verifies that protecting only the first two AES rounds thwarts cache based timing attacks.
Keywords :
cryptography; AES; advanced encryption standard; pinpointing cache timing attacks; Cache memory; Computer science; Cryptography; Design engineering; Design optimization; Paper technology; Protection; Table lookup; Timing; Very large scale integration; AES; Cache Attacks; Countermeasures; Side Channel Attacks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2010. VLSID '10. 23rd International Conference on
Conference_Location :
Bangalore
ISSN :
1063-9667
Print_ISBN :
978-1-4244-5541-6
Type :
conf
DOI :
10.1109/VLSI.Design.2010.29
Filename :
5401353
Link To Document :
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