Low-yield flier wafer analysis strategies

This paper discusses several techniques for identifying, classifying, and analyzing low yielding flier wafers. Low yielding wafers in otherwise normal yielding lots can have significant impacts on yield variability and wafer costs. In addition, these unique instances can often mask and convolute larger baseline issues that have more significant impacts on die yield. Control charts using different statistical parameters can help identify these wafers. Once known, they can be classified by failure type, with that data then being stored in a database. These wafers can be analyzed for root cause with a number of techniques, which include in-line metrology correlations, wafer positional analysis, electrical bitmapping and failure analysis. The techniques in this paper are employed by the Product Engineering Department at the Spansion Fab25 facility, which manufactures 200 mm 0.11 micron Flash memory technologies