MOS transistor mismatch modelling for high voltage CMOS processes

An algorithm is presented to extract device mismatch parameters for high voltage transistors. The mismatch parameters are determined in two steps. The device mismatch for the threshold voltage, the gain factor and the mobility reduction are extracted from a sensitivity model in saturation, whereas the extraction of the drift-resistance mismatch is carried out based on a MOS transistor model in the ohmic region. The extracted parameters are implemented as part of circuit simulation libraries to be used for Monte Carlo simulation. Production control parameters enable the monitoring of device mismatch for high voltage transistors