DocumentCode
3323714
Title
Design and analysis of reliable maintenance networks for wafer scale integration
Author
Landis, David L. ; Check, William A.
Author_Institution
Dept. of Electr. Eng., South Florida Univ., Tampa, FL, USA
fYear
1989
fDate
9-12 Apr 1989
Firstpage
665
Abstract
The authors describe the application of fault-tolerant and distributed networking concepts and techniques to VLSI system maintenance networks targeted to wafer-scale integration (WSI) designs. In particular, the effects on overall system reliability due to wafer-level maintenance network interconnection electromigration failures are evaluated. Distributed bus and ring networks are examined, and are evaluated using a series model in order to determine overall system reliability. A comparison is made between the distributed bus, distributed ring, and an ideal redundant ring maintenance network topology. It is shown that the effects of electromigration will significantly influence the topological design decision, and that the ring architecture has advantages for WSI under long mission time scenarios
Keywords
VLSI; circuit reliability; electromigration; VLSI; WSI; distributed bus; distributed networking; distributed ring; ideal redundant ring; long mission time scenarios; maintenance networks; network interconnection electromigration failures; ring networks; series model; system reliability; topological design; wafer scale integration; wafer-level maintenance; Built-in self-test; Circuit faults; Circuit testing; Electromigration; Integrated circuit interconnections; Maintenance; Network topology; Reliability; Standards development; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Southeastcon '89. Proceedings. Energy and Information Technologies in the Southeast., IEEE
Conference_Location
Columbia, SC
Type
conf
DOI
10.1109/SECON.1989.132473
Filename
132473
Link To Document