On optimizing system energy of GALS-based multi-core SoC in the presence of process variations

Energy efficiency is a primary design concern for the embedded system-on-chips (SoCs). However, the ever-increasing process variations (PV) lead performance parameters of the chip to deviate from the designated values, which significantly degrades the energy optimization efforts. In this paper, a variation aware energy optimization scheme is proposed, targeting multi-core SoC with voltage/frequency island (VFI) configurations. Our scheme is applied to the SoCs with partitioned VFIs at post-silicon phase, which helps to custom optimal task schedule for individual chips under PV effects. Combing the proposed task scheduling algorithm with dynamic voltage/frequency scaling (DVFS), we can achieve fine-grained system energy management. Experimental results demonstrate that the effectiveness of the proposed scheme.