GFLOPS: a general flexible linearly organized parallel structure for images

This paper describes a design of a linear array for use in MIMD, SIMD, pipeline and SPMD modes of programming for image processing applications. It gives some results for an evaluation. A great variety of algorithms, from low level algorithms used for pixel operations to high level algorithms used for performing region treatments or eventually for symbolic processing, may be implemented on this unique structure. The different memory banks of this structure are connected to the processors through a one stage interconnection network. This network is linearly expandable and provides a direct access from each processor to a subset of memory banks. The way the processors have been designed is such that they can operate in different modes. They can manage various memory organisations through memory address calculation capabilities. Each processor is structured around several general purpose processing units as in the VLIW model. The optimal number of these units is discussed