DocumentCode
3324746
Title
Scalable Packet Classification: Cutting or Merging?
Author
Jiang, Weirong ; Prasanna, Viktor K.
Author_Institution
Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear
2009
fDate
3-6 Aug. 2009
Firstpage
1
Lastpage
6
Abstract
Multi-field packet classification is a fundamental function that enables routers to support a variety of network services. Most of the existing multi-field packet classification algorithms can be divided into two classes: cutting-based and merging-based solutions. However, neither of them is scalable with respect to memory requirement for all rule sets with various characteristics. This paper makes several observations on real- life rule sets and proposes a novel hybrid scheme to leverage the desirable features of the two classes of algorithms. We propose a SRAM-based parallel multi-pipeline architecture to achieve high throughput. Several challenges in mapping the hybrid algorithm onto the architecture are addressed. Extensive simulations and FPGA implementation results show that the proposed scheme sustains 80 Gbps throughput for minimum size (40 bytes) packets while consuming a small amount of on-chip resources for large rule sets consisting of up to 10 K unique entries.
Keywords
SRAM chips; field programmable gate arrays; packet radio networks; parallel architectures; FPGA implementation; SRAM; multifield packet classification; network services; parallel multipipeline architecture; scalable packet classification; Classification algorithms; Field programmable gate arrays; Filters; Hardware; IP networks; Merging; Scalability; Throughput; Transport protocols; Web and internet services;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Communications and Networks, 2009. ICCCN 2009. Proceedings of 18th Internatonal Conference on
Conference_Location
San Francisco, CA
ISSN
1095-2055
Print_ISBN
978-1-4244-4581-3
Electronic_ISBN
1095-2055
Type
conf
DOI
10.1109/ICCCN.2009.5235380
Filename
5235380
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