Title :
Linear arithmetic code and its application in fault-tolerant systolic array
Author :
Han, Jia-Yuan ; Krishnan, D.C.
Author_Institution :
Dept. of Electr. Eng., Southern Illinois Univ., Carbondale, IL, USA
Abstract :
Fault-tolerant systolic arrays for matrix-vector multiplication are proposed. A novel method called the linear arithmetic code technique is introduced which can detect and correct n errors caused by a single faulty module in a linear systolic array. This approach can be extended to other matrix operations
Keywords :
cellular arrays; digital arithmetic; encoding; error correction; error correction codes; error detection; error detection codes; fault tolerant computing; logic arrays; error correction; error detection; fault-tolerant systolic array; linear arithmetic code technique; linear systolic array; matrix-vector multiplication; single faulty module; Arithmetic; Electrical fault detection; Error correction; Fault detection; Fault tolerance; Hardware; Linear code; Matrix decomposition; Redundancy; Systolic arrays;
Conference_Titel :
Southeastcon '89. Proceedings. Energy and Information Technologies in the Southeast., IEEE
Conference_Location :
Columbia, SC
DOI :
10.1109/SECON.1989.132562
