A 2-D DSP chip for image processing

The authors present a VLSI multiprocessor architecture for 2-D digital signal processing. This multiprocessor architecture uses a specially designed high-performance DSP (digital signal processor) as a node in a real-time system. The DSP architecture is based on a computational primitive developed by algorithm decomposition techniques and is used for the real-time implementation of 2-D DLSI (discrete linear shift-invariant) systems. As an example, the authors designed a prototype single-chip DSP chip using 1.25-μm double-metal CMOS technology to operate with a 40-MHz system clock. This multiprocessor system has a simple interconnection network and a simple control scheme. Each processor in this multiprocessor system operates asynchronously, thus providing very efficient operation. This VLSI architecture also has the advantage that the complexity and number of computations per input do not increase as the size of the input data is increased. Thus, very large 2-D data can be processed in near real time