Title :
Time redundant error detection scheme in computer architecture for fuzzy logic
Author :
Han, Jim-Yuan ; Krishnan, D.C.
Author_Institution :
Dept. of Electr. Eng., Southern Illinois Univ., Carbondale, IL, USA
Abstract :
An error detection scheme is proposed for a fuzzy inference system. First, the basic operation modules for minimum, maximum, and inverse operations are designed for fuzzy logic using ordinary binary logic gates. Then the error detection method called RESO (recomputing with shifted operands), which uses time redundancy for error detection and correction is applied for error detection in fuzzy inference arrays
Keywords :
computer architecture; error correction; error detection; fault tolerant computing; fuzzy logic; RESO; binary logic gates; computer architecture; error correction; fuzzy inference system; fuzzy logic; recomputing; shifted operands; time redundant error detection; Computer architecture; Computer errors; Error correction; Fuzzy logic; Fuzzy systems; Inference mechanisms; Logic arrays; Redundancy; Systolic arrays; Temperature control;
Conference_Titel :
Southeastcon '89. Proceedings. Energy and Information Technologies in the Southeast., IEEE
Conference_Location :
Columbia, SC
DOI :
10.1109/SECON.1989.132564
