Implementation of a pulse mode RBFNN with on-chip learning based edge detection system

This paper presents a new compact hardware implementation of pulse mode Radial Basis Function Neural Network (RBFNN) with on-chip learning capacity. Since, hardware on-chip learning is a difficult issue, this work deals a hybrid process based into two stages. To update the centers positions of the radial activation functions, we apply the K-means algorithm, while to modify the connection weights; we used the back-propagation algorithm. The hardware implementation steeps of the whole network are given in details. The corresponding design was validated and implemented into the FPGA platform. To ensure the efficiency of the proposed design, we consider edge detection operation, which is a very important step in image processing. Experiential results show good approximation features and effective generalization test.