Design exploration of graphene-FET based ring-oscillator circuits: A test-bench for large-signal compact models

This paper presents a design-oriented characterization of ring-oscillator (RO) circuits based on complementary-inverters (INVs) implemented with graphene-FET (GFET) devices. A large-signal GFET compact model based on drift-diffusion transport is benchmarked at the circuit level against a second GFET compact model based on virtual source. Transient-based simulations of a 3-cell RO yield performance metrics in terms of operating frequency and voltage dynamic range. Against these metrics, a comprehensive design space exploration covering as input design variables parameters as GFET gate-oxide thickness t_OX and channel-length L is presented. Methodologically, the work presents a general-purpose design framework, illustrated for ROs, which establishes a vertical circuit-device co-design environment. Its double-fold outcome is to provide guidelines both to bottom-up dimension and size the circuit, as well as top-down refine GFET device models and in turn GFET technology.