Title :
High speed communicator for fault tolerant systems
Author_Institution :
Charles Stark Draper Lab. Inc., Cambridge, MA, USA
fDate :
31 Oct-7 Nov 1998
Abstract :
A layered architecture for a communicator was presented which allows four COTS processor boards, each in a standard backplane such as VMEbus or CompactPCI, to be networked together to produce a quad-redundant fault tolerant computer. The communicator features a high-bandwidth data exchange making data reliably congruent across the four channels
Keywords :
electronic data interchange; fault tolerant computing; message switching; redundancy; system buses; COTS processor boards; CompactPCI; VMEbus; communicator; fault tolerant systems; high-bandwidth data exchange; layered architecture; quad-redundant fault tolerant computer; standard backplane; Backplanes; Communication system control; Computer architecture; Computer networks; Control systems; Fault tolerance; Fault tolerant systems; Laboratories; Marine vehicles; Mesh networks;
Conference_Titel :
Digital Avionics Systems Conference, 1998. Proceedings., 17th DASC. The AIAA/IEEE/SAE
Conference_Location :
Bellevue, WA
Print_ISBN :
0-7803-5086-3
DOI :
10.1109/DASC.1998.741517
