• DocumentCode
    332602
  • Title

    Design for diagnosability of CMOS circuits

  • Author

    Xiaoqing, Wen ; Honzawa, Tooru ; Tamamoto, Hideo ; Saluja, Kewal K. ; Kinoshita, Kozo

  • Author_Institution
    SynTest Technol. Inc., Sunnyvale, CA, USA
  • fYear
    1998
  • fDate
    2-4 Dec 1998
  • Firstpage
    144
  • Lastpage
    149
  • Abstract
    This paper presents a new approach to improving the diagnosability of a CMOS circuit by dividing it into independent partitions and using a separate power supply for each partition. This technique makes it possible to implement multiple IDDQ measurement points. As a result, the diagnosability of the circuit can be improved. The problem of partitioning a circuit is addressed and optimum and heuristic solutions are proposed. The effectiveness of our approach is demonstrated through experimental results
  • Keywords
    CMOS digital integrated circuits; design for testability; fault diagnosis; integrated circuit design; integrated circuit testing; logic partitioning; logic testing; CMOS circuits; IDDQ testing; design for diagnosability; independent circuit partitions; multiple IDDQ measurement points; separate power supply; CMOS logic circuits; Circuit faults; Circuit simulation; Controllability; Electrical fault detection; Fault diagnosis; Manufacturing; Observability; Power measurement; Power supplies; Semiconductor device modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-8186-8277-9
  • Type

    conf

  • DOI
    10.1109/ATS.1998.741605
  • Filename
    741605
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=332602