Graphene FET evaluation for RF and mmWave circuit applications

This letter presents the characterisation of a GFET transistor with a source-pull/load-pull test bench. The characterisation shows that despite the good f_T and f_MAX, it is hard to achieve reasonable power gain using the GFET device in a circuit configuration. This is due to the very high impedance at the gate making impedance matching at the input extremely difficult. An electrical model is used to evaluate the optimum power gain of the transistor under matched conditions. In a second part, a benchmarking of the technology is realized through accurate simulation of an optimised GFET device. Based on this input data, a compact model permits the evaluation of the GFET for high frequency amplifications.