DocumentCode
3326420
Title
Design of low complexity programmable FIR filters using multiplexers array optimization
Author
Weiao Ding ; Jiajia Chen
Author_Institution
Singapore Univ. of Technol. & Design, Singapore, Singapore
fYear
2015
fDate
24-27 May 2015
Firstpage
2960
Lastpage
2963
Abstract
This paper presents a new method to design low complexity programmable FIR filters by the merit of optimization on the multiplexer array. Searching approach for efficient common subexpressions has been presented to design each filter tap with the minimum number of multiplexers. The other multiplexer optimization technique is also proposed to reduce the number of inputs of multiplexers. These design methods contributed to the significant complexity reduction comparing to other design methods. Logic synthesis result shows that the designed 12-bit programmable filter can achieve the complexity saving up to 40.37% in ASIC implementation and 36.31% in FPGA implementation over other existing methods.
Keywords
FIR filters; application specific integrated circuits; field programmable gate arrays; multiplexing equipment; ASIC implementation; FPGA implementation; complexity reduction; logic synthesis; low complexity programmable FIR filters; multiplexers array optimization technique; Adders; Algorithm design and analysis; Arrays; Complexity theory; Finite impulse response filters; Multiplexing; Optimization;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location
Lisbon
Type
conf
DOI
10.1109/ISCAS.2015.7169308
Filename
7169308
Link To Document