Title :
Multi-mode sorted QR decomposition for 4×4 and 8×8 single-user/multi-user MIMO precoding
Author :
Chi-Mao Chen ; Chih-Hsiang Lin ; Pei-Yun Tsai
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
Abstract :
This paper presents a configurable multi-mode QR decomposition (QRD) processor. It supports 4×4 and 8×8 QRD with multi-layer sorting for single-user MIMO precoding. Besides, it can perform block-based sorting for multi-user MIMO precoding. Both forward mode for decomposition and backward mode for signal precoding are provided. This QRD processor is designed in pipelined systolic array. An in-place strategy with pointer-based control mechanism is proposed for sorting buffers, which reduces 42.3% D flip-flops. The proposed processor implemented in 90nm CMOS technology can generate 9.45MQRD/s for decomposing 8×8 channel matrix with sorting, and outperforms the related works in terms of throughput and hardware efficiency.
Keywords :
CMOS integrated circuits; MIMO communication; matrix algebra; precoding; CMOS technology; QRD processor; backward mode; channel matrix; multilayer sorting; multimode sorted QR decomposition; pipelined systolic array; pointer based control mechanism; signal precoding; single user MIMO precoding; single-user-multi-user MIMO precoding; sorting buffers; Arrays; Hardware; MIMO; Matrix decomposition; Sorting; Throughput; MIMO precoding; QR decomposition; multi-user MIMO; sorting; systolic array;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7169313
