• DocumentCode
    332654
  • Title

    Tutorial 3 High-level Design Validation And Test

  • Author

    Dey, Shuvashis ; Abraham, Jibi ; Zorian, Y.

  • fYear
    1998
  • fDate
    8-12 Nov. 1998
  • Firstpage
    3
  • Lastpage
    3
  • Abstract
    Summary form only given. This tutorial is intended for desi<%nersC, AD tool developers, and researchers interested in addressing verification and test of VLSI systems at higher levels of abstraction, including verification and test of processors, general ASICs, and hardware-software system chips.
  • Keywords
    Tutorials;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1998. ICCAD 98. Digest of Technical Papers. 1998 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA, USA
  • Print_ISBN
    1-58113-008-2
  • Type

    conf

  • DOI
    10.1109/ICCAD.1998.144234
  • Filename
    742797
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=332654