DocumentCode
3326545
Title
Implementation of application-specific signal processor for high-speed communication systems
Author
Lee, Jeong H. ; Heo, Kyung R. ; Sunwoo, Myung H.
Author_Institution
Sch. of Electr. & Comput. Eng., Ajou Univ., Suwon, South Korea
fYear
2004
fDate
18-19 Nov. 2004
Firstpage
250
Lastpage
255
Abstract
This paper describes the implementation of an application-specific DSP for OFDM communication systems. The proposed instructions can support computations of various blocks in OFDM systems. The data ALU is specially designed and optimized for the proposed instructions. Performance comparisons show that the number of clock cycles improves over 10% compared with Carmel DSP, over 50% compared with TMS320C62X for FFT computation and over 40%-80% for scrambling, convolutional encoding and interleaving, compared with these DSPs. However, the size of the DSP is much smaller than existing DSPs. The proposed architecture is implemented using the iPROVE FPGA board and verification is performed using assembly programs that implement most of the OFDM blocks.
Keywords
OFDM modulation; application specific integrated circuits; convolutional codes; digital signal processing chips; fast Fourier transforms; field programmable gate arrays; FFT computation; FPGA; OFDM communication; application-specific DSP; application-specific signal processor; convolutional encoding; data ALU; high-speed communication systems; interleaving; scrambling; Clocks; Computer aided instruction; Computer architecture; Convolution; Design optimization; Digital signal processing; Encoding; Interleaved codes; OFDM; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Signal Processing and Communication Systems, 2004. ISPACS 2004. Proceedings of 2004 International Symposium on
Print_ISBN
0-7803-8639-6
Type
conf
DOI
10.1109/ISPACS.2004.1439054
Filename
1439054
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