Title :
On primitive fault test generation in non-scan sequential circuits
Author :
Tekumalla, R.C. ; Menon, P.R.
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses the concept of sensitizing cubes introduced in an earlier paper and a new, more efficient algorithm for generating them. Sensitizing cubes of the next-state and output logic are used to obtain static sensitizing vectors that can be applied to the non-scan sequential circuit as part of a vector-pair. These vector-pairs are also used in deriving robust tests. Initializing sequences from a reset state and sequences that propagate fault effects from flip-flops to primary outputs are also generated. The proposed method has been implemented and used to derive tests for primitive faults in ISCAS´89 and MCNC´91 benchmark circuits.
Keywords :
circuit testing; delays; fault diagnosis; logic testing; sequential circuits; ISCAS´89 benchmark circuits; MCNC´91 benchmark circuits; fault effect propagation; flip-flops; initializing sequences; next-state; nonscan sequential circuits; output logic; primary outputs; primitive fault test generation; primitive path-delay fault identification; reset state; robust tests; robustly testable primitive faults; sensitizing cubes; static sensitizing vectors; vector-pair; Circuit faults; Circuit testing; Combinational circuits; Delay effects; Fault diagnosis; Logic testing; Propagation delay; Robustness; Sequential analysis; Sequential circuits;
Conference_Titel :
Computer-Aided Design, 1998. ICCAD 98. Digest of Technical Papers. 1998 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
1-58113-008-2
DOI :
10.1109/ICCAD.1998.144278
