IDeF-X SX0: A low power CMOS ASIC for the readout of Cd(Zn)Te detectors

The last member of the IDeF-X ASIC family is presented: IDeF-X SX0 a 32-channel front end ASIC designed for the readout of Cadmium Telluride (CdTe) and Cadmium Zinc Telluride (CdZnTe) Detectors. It has been designed in the standard AMS CMOS 0.35 ¿m process technology. The ASIC has been optimized to reduce the power consumption which is now 600 ¿W per channel; it is five times lower than the power consumption of the previous IDeF-X ECLAIRs chip. Moreover, the dynamic range of the ASIC can now be extended to more than 1 MeV thanks to the in-channel variable gain stage. When no detector is connected to the chip, the lowest equivalent noise charge (ENC), achieved at a 9 ¿s peak time, is 72 electrons rms. IDeF-X SX0 has been evaluated by performing spectroscopy measurements at room temperature with a thin CdTe Schottky detector. The energy resolution was found to be 1.6 keV fwhm at 60 keV with an ²⁴¹Am source. The ASIC has been designed for space applications and it will be used for the readout of 16 × 16 pixels CdTe or CdZnTe pixellated detectors to build a new low power Caliste micro Gamma camera.