DocumentCode
3327252
Title
TCPT - Thread criticality-driven prefetcher throttling
Author
Panda, Biplab ; Balachandran, Shankar
Author_Institution
Dept. of CSE, Indian Inst. of Technol., Madras, Chennai, India
fYear
2013
fDate
7-11 Sept. 2013
Firstpage
399
Lastpage
399
Abstract
A single parallel application running on a multicore system shows sub-linear speedup because of slow progress of one or more threads known as critical threads. Identifying critical threads and accelerating them can improve system performance. One of the metrics that correlate to thread criticality is the number of cache misses and the penalty associated with it. This paper proposes a throttling mechanism called TCPT which throttles hardware prefetchers by changing the prefetch degree based on the thread criticality.
Keywords
cache storage; multi-threading; multiprocessing systems; storage management; TCPT; cache misses; hardware prefetchers; multicore system; prefetch degree; single parallel application; sublinear speedup; system performance; thread criticality-driven prefetcher throttling; throttling mechanism; Electronic mail; Hardware; Measurement; Pollution; Prefetching; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures and Compilation Techniques (PACT), 2013 22nd International Conference on
Conference_Location
Edinburgh
ISSN
1089-795X
Print_ISBN
978-1-4799-1018-2
Type
conf
DOI
10.1109/PACT.2013.6618835
Filename
6618835
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