DocumentCode :
332781
Title :
Polynomial methods for component matching and verification
Author :
Smith, J. ; De Micheli, G.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
fYear :
1998
fDate :
8-12 Nov. 1998
Firstpage :
678
Lastpage :
685
Abstract :
Component reuse requires designers to determine whether or not an existing component implements desired functionality. If a common structure is used to represent components that are described at multiple levels of abstraction, comparisons between circuit specifications and a library of potential implementations can be performed quickly. A mechanism is presented for compactly specifying circuit functionality as polynomials at the word level. Polynomials can be used to represent circuits that are described at the bit level or arithmetically. Furthermore, in representing components as polynomials, differences in precision between potential implementations can be detected and quantified.
Keywords :
circuit CAD; formal verification; integrated circuit design; polynomials; circuit functionality; circuit specifications; component matching; component reuse; component verification; integrated circuit design; multiple abstraction levels; polynomial methods; Arithmetic; Automation; Circuits; Discrete cosine transforms; Encoding; Frequency; Laboratories; Libraries; Polynomials; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1998. ICCAD 98. Digest of Technical Papers. 1998 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
1-58113-008-2
Type :
conf
DOI :
10.1109/ICCAD.1998.144342
Filename :
743096
Link To Document :
بازگشت