• DocumentCode
    332813
  • Title

    Toward understanding “Iddq-only” fails

  • Author

    Gattiker, Anne E. ; Maly, Wojciech

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
  • fYear
    1998
  • fDate
    18-23 Oct 1998
  • Firstpage
    174
  • Lastpage
    183
  • Abstract
    This paper investigates the important question of whether or not Iddq-only fails are “bad” and should be rejected during testing. The analysis is based on the Sematech experiment results and employs current signature-based testing
  • Keywords
    CMOS integrated circuits; application specific integrated circuits; electric current measurement; failure analysis; fault diagnosis; integrated circuit testing; ASIC; CMOS; IC testing; Iddq-only; Sematech experiment; current signature-based testing; failure analysis; fault detection; Application specific integrated circuits; Circuit testing; Delay; Histograms; Integrated circuit modeling; Integrated circuit testing; Manufacturing; Packaging; Voltage; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1998. Proceedings., International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-5093-6
  • Type

    conf

  • DOI
    10.1109/TEST.1998.743150
  • Filename
    743150
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=332813