Title :
Toward understanding “Iddq-only” fails
Author :
Gattiker, Anne E. ; Maly, Wojciech
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
This paper investigates the important question of whether or not Iddq-only fails are “bad” and should be rejected during testing. The analysis is based on the Sematech experiment results and employs current signature-based testing
Keywords :
CMOS integrated circuits; application specific integrated circuits; electric current measurement; failure analysis; fault diagnosis; integrated circuit testing; ASIC; CMOS; IC testing; Iddq-only; Sematech experiment; current signature-based testing; failure analysis; fault detection; Application specific integrated circuits; Circuit testing; Delay; Histograms; Integrated circuit modeling; Integrated circuit testing; Manufacturing; Packaging; Voltage; Wafer scale integration;
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5093-6
DOI :
10.1109/TEST.1998.743150