Improved sensitivity for parallel test of substrate interconnections

A digital method has been introduced previously for testing the interconnections between signal pins within high-density substrates such as multichip modules. This technique, while very effective at detecting and diagnosing catastrophic faults (complete opens and low-resistance shorts), has limited sensitivity to “near” failures (resistive opens and high-resistance shorts). This paper quantifies the sensitivity of the original method for detecting several classes of near failures. The sensitivity is found to be on the order of 100 Ω for both near opens and near shorts in a typical implementation. To improve upon this, a significant variation on the original method is introduced. Rather than rely entirely on resistance differences to produce detectable voltage variations, the new approach couples these with a fixed capacitance to produce an RC rise-time change. The fault is then diagnosed with greater precision while still using fixed-threshold comparators