Triggering and clocking architecture for mixed signal test

Author

Zaman, Naveed ; Spilman, Antony

Author_Institution

Schlumberger, Autom. Test Equip

fYear

1998

fDate

18-23 Oct 1998

Firstpage

496

Lastpage

499

Abstract

A new architecture and its implementation for triggering and clocking functions in a mixed signal tester with flying adder based digital tester periods and an asynchronous, variable frequency clock for mixed signal testing is presented. The approach discussed in the paper offers a solution for very precise edge placement, with a high degree of resolution of the sourcing and sampling clocks with respect to a digital event

Keywords

asynchronous circuits; automatic test equipment; automatic testing; clocks; integrated circuit testing; logic testing; mixed analogue-digital integrated circuits; synchronisation; asynchronous variable frequency clock; clocking functions; digital logic testing; flying adder based digital tester periods; high degree of resolution; mixed signal test; sourcing and sampling clocks; synchronisation; tester architecture; top level implementation; triggering and clocking architecture; triggering functions; variable analog clocks; very precise edge placement; Adders; Automatic testing; Clocks; Frequency synchronization; Integrated circuit testing; Jitter; Logic testing; Sampling methods; Signal resolution; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1998. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-5093-6

Type

conf

DOI

10.1109/TEST.1998.743191

Filename

743191