Design of address generation unit for audio DSP

Author

Kim, Ji Y. ; Sunwoo, Myung H.

Author_Institution

Sch. of Electr. & Comput. Eng., Ajou Univ., Suwon, South Korea

fYear

2004

fDate

18-19 Nov. 2004

Firstpage

616

Lastpage

619

Abstract

The paper presents an address generation unit (AGU) for an audio DSP. The proposed AGU employs an enhanced FFT address generation unit (FAGU) that automatically calculates the butterfly input/output data addresses. The FFT is one of the key tasks for the modified discrete cosine transform (MDCT) mostly used in various audio algorithms. The number of FFT computation cycles can be reduced by the proposed FAGU. The proposed AGU has been synthesized using the SEC 0.18 μm standard cell library. The proposed FAGU has been implemented and the gate count is 1,523. The size is decreased about 73% compared with the FAGU that we have previously proposed.

Keywords

application specific integrated circuits; audio coding; digital signal processing chips; discrete cosine transforms; fast Fourier transforms; integrated circuit design; logic design; transform coding; 0.18 micron; ASIC; MDCT; application-specific DSP chips; audio DSP; audio coding; butterfly input/output data addresses; enhanced FFT address generation unit; modified DCT; modified discrete cosine transform; Application specific integrated circuits; Audio systems; Computer architecture; Decoding; Digital signal processing; Digital signal processing chips; Discrete cosine transforms; Equations; Signal processing algorithms; Variable speed drives;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Signal Processing and Communication Systems, 2004. ISPACS 2004. Proceedings of 2004 International Symposium on

Print_ISBN

0-7803-8639-6

Type

conf

DOI

10.1109/ISPACS.2004.1439131

Filename

1439131